1. Field of Invention
The present invention relates to wafer working methods and, more particularly, to a wafer working method suitable for performing a process from surface machining to mounting of a semiconductor wafer cut to a chip size without causing any defect.
2. Description of Related Art
In a process for fabricating a semiconductor device, an electronic component, or the like, it is a general practice to subject a wafer formed with a semiconductor device, an electronic component, or the like on an obverse side thereof to process steps including probing, dicing, die bonding, and wire bonding and then to packaging with resin molding seal, to give a finished product of the semiconductor device, electronic component, or the like.
In recent years, there has been increasing demand for a very thin semiconductor device or electronic component to be incorporated into a memory card, a thin IC card, or the like. Accordingly, increasing demand exists for a very thin wafer having a thickness of not more than 100 μm. It has been a conventional practice to divide a wafer into individual chips by a dicing step after a probing step. Instead such a conventional practice, a process has now been adopted in which the reverse side of a wafer is subjected to grinding (back grinding) to give a very thin wafer having a thickness of not more than 100 μm prior to the dicing step and then the wafer is subjected to dicing.
Under such a background condition, a chip is fabricated by the following procedure as shown in a flowchart of FIG. 16 according to a conventional chip fabrication method for a semiconductor device, an electronic component, or the like.
Initially, for protection of the obverse side of a wafer on which a multiplicity of semiconductor devices, electronic components, or the like are formed, a protective sheet having adhesive on one side thereof (which is also called “protective tape”) is affixed to the obverse side of the wafer (step S101). Subsequently, a back grinding step is performed to grind the wafer from the reverse side thereof to a predetermined thickness (step S103).
After the back grinding step, a frame mounting step of mounting the wafer on a dicing frame by using a dicing sheet having adhesive on one side thereof (which is also called “dicing tape”), is performed to unify the wafer and the dicing frame together (step S105). The wafer in this state is attracted on the dicing sheet side, and the protective sheet affixed to the obverse side of the wafer is peeled off (step S107).
The wafer from which the protective sheet has been peeled off, together with the frame, is conveyed to a dicing saw and then cut into individual chips by means of a diamond blade revolving at a high speed (step S109). The individual chips resulting from the cutting remain bonded to the dicing sheet S without being separated from each other and hence retain the form of a wafer as shown in FIG. 17. For this reason, an assembly of chips T retaining the form of a wafer will be referred to as “wafer W” for convenience.
The dicing sheet S on the wafer W thus cut is radially expanded in an expanding step, so that the spacing between adjacent ones of the individual chips T is expanded (step S111). In a chip mounting step, each chip T is mounted on a package base such as a lead frame (step S113). A chip is fabricated by such a process as described above.
The conventional chip fabrication method, however, involves a problem that when a very thin wafer W having a thickness of not more than 100 μm is subjected to cutting by dicing saw, a number of defective chips are produced due to chipping or cracking of the wafer W that occurs at the time of cutting.
As means for solving this problem, proposals have been made of techniques related to a laser beam machining method employed instead of cutting by the conventional dicing saw, wherein laser light having a focal point positioned inside the wafer W is allowed to become incident on the wafer W to form a modified region inside the wafer W by multiphoton absorption, thereby dividing the wafer W into individual chips T (see patent documents 1 to 6 for example).
The techniques proposed in the patent documents 1 to 6 noted above propose a dicing apparatus (hereinafter will be referred to as “laser dicing apparatus”) which is configured to focus laser light L emitted from a laser light source LS onto the interior of the wafer W to form a continuous modified region K inside the wafer W as shown in FIG. 18 thereby dividedly cutting the wafer W, instead of a conventional dicing apparatus using a dicing saw.
Since the laser dicing apparatus divides a wafer into chips by using laser light instead of a diamond blade revolving at a high speed, a large force is not exerted on the wafer and, hence, chipping or cracking does not occur. Also, since the laser dicing apparatus does not have any portion to contact the wafer directly and hence does not allow heat or cutting swarf to be produced, no cutting water is needed. Further, since the modified region is formed inside the wafer to dividedly cut the wafer into chips, the spacing between adjacent chips is very narrow as compared with that resulting from cutting by diamond blade and, therefore, a larger number of chips can be obtained from one wafer.    Patent Document 1: Japanese Patent Application Laid-Open No. 2002-192367    Patent Document 2: Japanese Patent Application Laid-Open No. 2002-192368    Patent Document 3: Japanese Patent Application Laid-Open No. 2002-192369    Patent Document 4: Japanese Patent Application Laid-Open No. 2002-192370    Patent Document 5: Japanese Patent Application Laid-Open No. 2002-192371    Patent Document 6: Japanese Patent Application Laid-Open No. 2002-205180
With such a laser dicing apparatus, however, in some cases the wafer is undesirably broken up from the inside modified region as a starting point by impact or vibration that occurs during conveyance between apparatuses used in respective steps performed after dicing. The wafer, once broken up, cannot be handled as a wafer, which raises a problem that the subsequent steps are seriously hindered from proceeding.
In view of this problem, the inventor of the present invention has studied a method including: grinding and polishing the reverse side of a wafer to a thickness larger than a finally worked wafer thickness (first machining); irradiating laser light to the wafer to form a modified region inside the wafer; and then again grinding and polishing the reverse side of the wafer to the finally worked wafer thickness (second machining). This method has demonstrated a noticeable effect.
In this process, however, there has been observed in the second machining a phenomenon that due to the mechanical strength of the wafer lowered by the modified region, chipping occurs at a peripheral portion of the wafer and the resulting chipping is caught between a grinding wheel and the wafer to cause a scratch or caught between a polishing pad and the wafer to cause a flaw.
When such chipping is large, a notch portion or an orientation flat portion of the wafer may be damaged to give rise to an inconvenience in wafer alignment.